Low input current optocoupler Broadcom HCPL-M701-000E with separate photodiode and output stage pins
Product Overview
The HCPL-M700/HCPL-M701 are small outline, 5-lead, low input current, high gain optocouplers designed for surface mounting. These single-channel devices offer a high current transfer ratio (CTR) and are electrically equivalent to specific Avago optocouplers. Their miniature footprint is approximately one-fourth the area of standard dual-in-line packages and is compatible with standard surface mount processes. Featuring a Light Emitting Diode and an integrated high gain photo-detector, they provide efficient current transfer. Separate pins for the photodiode and output stage ensure TTL compatible saturation voltages and high-speed operation. The HCPL-M701 is optimized for CMOS, LSTTL, or other low power applications with a guaranteed 400% minimum CTR over a 0-70C range at 0.5 mA LED current. The HCPL-M700 is primarily for TTL applications with a 300% minimum CTR at 1.6 mA LED current. These optocouplers are ideal for ground isolation of various logic families, line receivers, telephone ring detection, AC line voltage status indication, and low power systems.
Product Attributes
- Brand: Avago Technologies
- Package Outline: SO-5 (JEDEC registered MO-155)
- Certifications: Recognized under the component program of U.L. (file No. E55361) for dielectric withstand proof test voltage of 3750 Vac, 1 minute; Approved under CSA Component Acceptance Notice #5, File CA 88324.
- Lead Free Option: Available (-000E)
- Material Group: IIIa (per DIN VDE 0109)
- Isolation Group: IIIa (per DIN VDE 0109)
Technical Specifications
| Parameter | Symbol | Device | Min. | Typ.* | Max. | Units | Conditions | Fig. | Note |
|---|---|---|---|---|---|---|---|---|---|
| Absolute Maximum Ratings (No Derating Required up to 85C) | |||||||||
| Storage Temperature | -55 | 125 | C | ||||||
| Operating Temperature | -40 | 85 | C | ||||||
| Average Input Current | IF | 20 | mA | ||||||
| Peak Input Current | IF | 40 | mA | (50% duty cycle, 1 ms pulse width) | |||||
| Peak Transient Input Current | IF | 1.0 | A | (1 s pulse width, 300 pps) | |||||
| Reverse Input Voltage | VR | 5 | V | ||||||
| Input Power Dissipation | 35 | mW | |||||||
| Output Current | IO | (Pin 5) | 60 | mA | |||||
| Supply and Output Voltage | VCC (Pin 6-4), VO (Pin 5-4) | HCPL-M700 | -0.5 | 7 | V | ||||
| Supply and Output Voltage | VCC (Pin 6-4), VO (Pin 5-4) | HCPL-M701 | -0.5 | 18 | V | ||||
| Output Power Dissipation | 100 | mW | |||||||
| Electrical Specifications (TA = 0C to 70C unless otherwise specified) | |||||||||
| Current Transfer Ratio | CTR | HCPL-M701 | 400 | 3500 | % | IF = 0.5 mA, VO = 0.4 V, VCC = 4.5 V | 2, 3 | 1 | |
| Current Transfer Ratio | CTR | HCPL-M701 | 500 | 2600 | % | IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V | 2, 3 | 1 | |
| Current Transfer Ratio | CTR | HCPL-M700 | 300 | 2600 | % | IF = 1.6 mA, VO = 0.4 V, VCC = 4.5 V | 2, 3 | 1 | |
| Logic Low Output Voltage | VOL | HCPL-M701 | 0.1 | 0.4 | V | IF = 1.6 mA, IO = 8 mA, VCC = 4.5 V | 1 | ||
| Logic Low Output Voltage | VOL | HCPL-M701 | 0.1 | 0.4 | V | IF = 5 mA, IO = 15 mA, VCC = 4.5 V | 1 | ||
| Logic Low Output Voltage | VOL | HCPL-M701 | 0.2 | 0.4 | V | IF = 12 mA, IO = 24 mA, VCC = 4.5 V | 1 | ||
| Logic Low Output Voltage | VOL | HCPL-M700 | 0.1 | 0.4 | V | IF = 1.6 mA, IO = 24 mA, VCC = 4.5 V | 1 | ||
| Logic High Output Current | IOH | HCPL-M701 | 0.05 | 100 | A | IF = 0 mA, VO = VCC = 18 V | |||
| Logic High Output Current | IOH | HCPL-M700 | 0.1 | 250 | A | IF = 0 mA, VO = VCC = 7 V | |||
| Logic Low Supply Current | ICCL | 0.4 | 1.5 | mA | IF = 1.6 mA, VO = Open, VCC = 18 V | ||||
| Logic High Supply Current | ICCH | 0.01 | 10 | A | IF = 0 mA, VO = Open, VCC = 18 V | ||||
| Forward Voltage | VF | 1.4 | 1.7 | V | IF = 1.6 mA, TA = 25C | 4 | |||
| Reverse Breakdown Voltage | BVR | 5 | IR = 10 A | V | |||||
| Temperature Coefficient of Forward Voltage | VF/TA | -1.8 | mV/C | IF = 1.6 mA | |||||
| Input Capacitance | CIN | 60 | pF | f = 1 MHz, VF = 0 | |||||
| Output Insulation Voltage | VISO | 3750 | VRMS | RH 50%, t = 1 min, TA = 25C | 2, 3 | ||||
| Insulation Resistance (Input-Output) | RI-O | 1012 | VI-O = 500 VDC | ||||||
| Isolation Capacitance (Input-Output) | CI-O | 0.6 | pF | f = 1 MHz | 2 | ||||
| Switching Specifications (TA = 0C to 70C, VCC = 5 V unless otherwise specified) | |||||||||
| Propagation Delay to Logic Low | tPHL | HCPL-M701 | 25 | 100 | s | TA = 25C IF = 0.5 mA | 5, 6, 7 | ||
| Propagation Delay to Logic Low | tPHL | HCPL-M701 | 0.5 | 2 | s | TA = 25C IF = 12 mA | 5, 6, 7 | ||
| Propagation Delay to Logic Low | tPHL | HCPL-M700 | 5 | 20 | s | TA = 25C IF = 1.6 mA | 5, 6, 7 | ||
| Propagation Delay to Logic High | tPLH | HCPL-M701 | 10 | 90 | s | TA = 25C IF = 0.5 mA | 5, 6, 7 | ||
| Propagation Delay to Logic High | tPLH | HCPL-M701 | 1 | 10 | s | TA = 25C IF = 12 mA | 5, 6, 7 | ||
| Propagation Delay to Logic High | tPLH | HCPL-M700 | 10 | 35 | s | TA = 25C IF = 1.6 mA | 5, 6, 7 | ||
| Common Mode Transient Immunity at Logic High Output | |CMH| | 1,000 | 10,000 | V/s | IF = 0 mA, RL = 2.2 k | 8 | 4, 5 | ||
| Common Mode Transient Immunity at Logic Low Output | |CML| | 1,000 | 10,000 | V/s | IF = 1.6 mA, RL = 2.2 k | 8 | 4, 5 | ||
| Dimensions (mm/inches) | |||||||||
| Length | 7.0 0.2 (0.276 0.008) | mm (inches) | |||||||
| Width | 4.4 0.1 (0.173 0.004) | mm (inches) | |||||||
| Height | 2.5 0.1 (0.098 0.004) | mm (inches) | |||||||
| Lead Pitch | 1.27 (0.050) BSC | mm (inches) | |||||||
| Lead Thickness | 0.15 0.025 (0.006 0.001) | mm (inches) | |||||||
*All typicals at TA = 25C, VCC = 5 V.
Notes:
- dc CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
- Device considered a two terminal device: pins 1 and 3 shorted together, and pins 4, 5 and 6 shorted together.
- In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 4500 VRMS for 1 second (leakage detection current limit, II-O 5 A).
- Common transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the rising edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the falling edge of the common mode pulse signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
- In applications where dV/dt may exceed 50,000 V/s (such as static discharge) a series resistor, RCC, should be included to protect the detector IC from destructively high surge currents. The recommended value is RCC = 220 .
- Use of a 0.1 F bypass capacitor connected between pins 4 and 6 is recommended.
Ordering Information:
| Option Part Number | RoHS Compliant | Non RoHS Compliant | Package | Mount | Surface Wing | Reel Quantity |
|---|---|---|---|---|---|---|
| HCPL-M700 | X | SO-5 | Surface Mount | 100 per tube | ||
| HCPL-M700-000E | X | SO-5 | Surface Mount | 100 per tube | ||
| HCPL-M701 | X | SO-5 | Surface Mount | 1500 per reel | ||
| HCPL-M701-500E | X | SO-5 | Surface Mount | #500 | 1500 per reel |
Example 1: HCPL-M700-500E to order product of Mini-flat Surface Mount 5-pin package in Tape and Reel packaging with RoHS compliant.
Example 2: HCPL-M700 to order product of Mini-flat Surface Mount 5-pin package in tube packaging and non RoHS compliant.
2506271149_Broadcom-HCPL-M701-000E_C17562859.pdf
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