Broadcom HCPL 9031 000E Digital Isolator with Industry Leading Speed and Excellent Transient Immunity
Product Overview
The Broadcom HCPL-90xx and HCPL-09xx series are high-speed CMOS digital isolators designed for robust performance and excellent transient immunity. Featuring industry-leading speed with a 100 Mbaud data rate, typical pulse width distortion of 2 ns, and typical propagation delay skew of 4 ns, these isolators are ideal for demanding digital communication applications. They offer 2500V RMS isolation and are available in various channel configurations (single, dual unidirectional/bidirectional, and quad) and package types (PDIP, Gull Wing, SOIC) to suit diverse design needs. Applications include digital fieldbus isolation, multiplexed data transmission, computer peripheral interfaces, and high-speed digital systems.
Product Attributes
- Brand: Broadcom
- Technology: CMOS Digital Isolators
- Certifications: UL1577, IEC 61010-1
- ESD Sensitivity: Requires normal static precautions.
- Not for: Military or aerospace applications.
Technical Specifications
| Model Series | Channels | Package Type | Data Rate | Isolation Voltage | Pulse Width Distortion (Typ.) | Propagation Delay Skew (Typ.) | Common Mode Rejection (Min.) | Temperature Range |
|---|---|---|---|---|---|---|---|---|
| HCPL-90xx / HCPL-09xx | Single, Dual, Quad | 8-pin PDIP, 8-pin Gull Wing, 8-pin SOIC, 16-pin SOIC (Narrow/Wide Body) | 100 Mbaud | 2500V RMS | 2 ns | 4 ns | 15 kV/s | -40C to +100C |
Key Features
- +3.3V and +5V TTL/CMOS compatible
- 3 ns max. pulse width distortion
- 6 ns max. propagation delay skew
- 15 ns max. propagation delay
- High speed: 100 MBd
- 15 kV/s min. common mode rejection
- Tri-state output (HCPL-9000/-0900)
- 2500V RMS isolation
- UL1577 and IEC 61010-1 approved
Applications
- Digital fieldbus isolation
- Multiplexed data transmission
- Computer peripheral interface
- High-speed digital systems
- Isolated data interfaces
- Logic level shifting
Ordering Information (Examples)
| Device | Channel Config | Package | Order Suffix | Description |
|---|---|---|---|---|
| HCPL-9031 | Dual, Bidirectional | 8-pin DIP (300 Mil) | -500E | Tape and Reel, RoHS Compliant |
| HCPL-0930 | Dual | 8-pin Small Outline | -500E | Tape and Reel, RoHS Compliant |
| HCPL-900J | Quad | 16-pin Small Outline, Wide Body | -500E | Tape and Reel, RoHS Compliant |
| HCPL-091J | Quad, 2/2, Bidirectional | 16-pin Small Outline, Narrow Body | -500E | Tape and Reel, RoHS Compliant |
Package Dimensions
(Refer to datasheet for detailed package outline drawings for 8-pin PDIP, 8-pin Gull Wing, 8-pin SOIC, and 16-pin SOIC Narrow/Wide Body packages.)
Electrical Characteristics (Typical at 3.3V Operation)
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
|---|---|---|---|---|---|---|
| Quiescent Supply Current 1 | IDD1 | - | 0.008 | 0.01 | mA | VIN = 0V (HCPL-9000/-0900) |
| Quiescent Supply Current 2 | IDD2 | - | 3.3 | 4.0 | mA | VIN = 0V (HCPL-9000/-0900) |
| Logic High Output Voltage | VOH | 0.8 * VDD2 | VDD2 0.5 | - | V | IOUT = 4 mA, VIN = VIH |
| Logic Low Output Voltage | VOL | - | 0 | 0.1 | V | IOUT = 20 A, VIN = VIL |
Switching Specifications (Typical at 3.3V Operation)
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
|---|---|---|---|---|---|---|
| Maximum Data Rate | - | 100 | 110 | - | MBd | CL = 15 pF |
| Propagation Delay Time to Logic Low Output | tPHL | - | 12 | 18 | ns | - |
| Propagation Delay Time to Logic High Output | tPLH | - | 12 | 18 | ns | - |
| Pulse Width Distortion | |PWD| | - | 2 | 3 | ns | |tPHL tPLH| |
| Propagation Delay Skew | tPSK | - | 4 | 6 | ns | - |
| Common Mode Transient Immunity | |CMH|, |CML| | 15 | 18 | - | kV/s | Vcm = 1000V |
Application Information
Power Consumption: Power consumption is frequency-dependent and independent of mark-to-space ratio, due to edge-triggered pulse transmission across the isolation barrier. Approximate supply current per channel: I(Input) = 40(f/fmax)(1/4) mA, where fmax = 50 MHz.
Signal Status on Start-up and Shut Down: To avoid ambiguous output states, designers should consider including an initialization signal in the start-up circuit.
Bypassing and PC Board Layout: Use low ESR 47 nF ceramic capacitors for power supply decoupling, placed close to VDD pins. Ground planes for GND1 and GND2 are recommended for data rates above 10 Mb/s.
2411271956_Broadcom-HCPL-9031-000E_C6873797.pdf
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