Broadcom HCPL 902J 000E high speed digital isolator with single dual and quad channel configurations
Broadcom HCPL-90xx and HCPL-09xx High-Speed Digital Isolators
Product Overview
The Broadcom HCPL-90xx and HCPL-09xx series are high-speed CMOS digital isolators designed for robust performance and excellent transient immunity. Featuring a symmetric magnetic coupling barrier, these isolators offer industry-leading speed with a typical pulse width distortion of 2 ns, a typical propagation delay skew of 4 ns, and a 100 Mbaud data rate. Available in single, dual, and quad-channel configurations, they are ideal for isolating data conversion devices, parallel buses, peripheral interfaces, and digital fieldbus applications. These devices support 3.3V and 5V TTL/CMOS logic levels and are specified for operation over a wide temperature range of 40C to +100C.
Product Attributes
- Brand: Broadcom
- Technology: CMOS Digital Isolators
- Certifications: UL1577, IEC 61010-1
- ESD Sensitivity: Requires normal static precautions
- Not for: Military or aerospace applications/environments
Technical Specifications
| Model Series | Channel Configuration | Package Type | Data Rate | Isolation Voltage | Pulse Width Distortion (Typ.) | Propagation Delay Skew (Typ.) | Common Mode Rejection (Min.) | Operating Temperature |
|---|---|---|---|---|---|---|---|---|
| HCPL-90xx / HCPL-09xx | Single | 8-pin PDIP (300 Mil) / 8-pin SOIC | 100 MBd | 2500V RMS | 2 ns | 4 ns | 15 kV/s | -40C to +100C |
| HCPL-90xx / HCPL-09xx | Dual (Unidirectional) | 8-pin DIP (300 Mil) / 8-pin SOIC | ||||||
| HCPL-90xx / HCPL-09xx | Dual (Bidirectional) | 8-pin DIP (300 Mil) / 8-pin SOIC | ||||||
| HCPL-90xx / HCPL-09xx | Quad (Various configurations) | 16-pin SOIC (Wide Body / Narrow Body) | 100 MBd | 2500V RMS | 2 ns | 4 ns | 15 kV/s | -40C to +100C |
| Key Features: +3.3V and +5V TTL/CMOS compatible, Tri-state output (HCPL-9000/-0900), High-speed operation | ||||||||
| Applications: Digital fieldbus isolation, Multiplexed data transmission, Computer peripheral interface, High-speed digital systems, Isolated data interfaces, Logic level shifting | ||||||||
| Electrical Specifications (Typical at TA = +25C): | ||||||||
| Parameter | Condition | Min. | Typ. | Max. | Unit | Notes | ||
| Supply Voltage | VDD1, VDD2 | 3.0 | 5.5 | V | Recommended Operating | |||
| Propagation Delay (tPLH) | 5V Operation, CL=15pF | 12 | 18 | ns | ||||
| Propagation Delay (tPHL) | 5V Operation, CL=15pF | 12 | 18 | ns | ||||
| Pulse Width Distortion (PWD) | 2 | 3 | ns | |tPHL tPLH| | ||||
| Propagation Delay Skew (tPSK) | 4 | 6 | ns | |||||
| Common Mode Transient Immunity | Vcm = 1000V | 15 | 18 | kV/s | |CMH|, |CML| | |||
Package Characteristics
| Parameter | Symbol | Min. | Typ. | Max. | Unit | Test Conditions |
|---|---|---|---|---|---|---|
| Capacitance (Input-Output) | CI-O | 1.1 (Single) / 2.0 (Dual) / 4.0 (Quad) | pF | f = 1 MHz | ||
| Barrier Resistance | >1014 | |||||
| Barrier Capacitance | 3 (Single/Dual) / 7 (Quad) | pF | ||||
| Creepage Distance (External) | 4.03 (16-pin Narrow) / 7.04 (8-pin PDIP) / 8.08 (16-pin Wide) | mm | ||||
| Leakage Current | 0.2 | A | 240 Vrms, 60 Hz |
Soldering Profile
Recommended reflow soldering conditions per JEDEC Standard J-STD-020 (latest revision).
Absolute Maximum Ratings
| Parameter | Symbol | Min. | Max. | Unit | Notes |
|---|---|---|---|---|---|
| Storage Temperature | TS | -55 | 150 | C | |
| Ambient Operating Temperature | TA | -55 | 125 | C | Absolute maximum; does not guarantee performance. |
| Supply Voltage | VDD1, VDD2 | -0.5 | 7 | V | |
| Lead Solder Temperature (10s) | 260 | C |
Recommended Operating Conditions
| Parameter | Symbol | Min. | Max. | Unit | Notes |
|---|---|---|---|---|---|
| Ambient Operating Temperature | TA | -40 | 100 | C | Specified range |
| Supply Voltage | VDD1, VDD2 | 3.0 | 5.5 | V |
Application Information
Power Consumption
Power consumption is frequency-dependent and independent of mark-to-space ratio, due to narrow current pulses (approx. 2.5 ns wide) used for data transmission across the isolation barrier. Approximate power supply current per channel: I(Input) = 40(f/fmax)(1/4) mA, where fmax = 50 MHz.
Signal Status on Start-up and Shut Down
To manage power and avoid ambiguous output states during power transitions, designers should consider incorporating an initialization signal to toggle the input.
Bypassing and PC Board Layout
Requires low ESR 47 nF ceramic capacitors for power supply decoupling, placed close to VDD pins. Ground planes for GND1 and GND2 are recommended for data rates above 10 Mb/s.
2411271956_Broadcom-HCPL-902J-000E_C7201540.pdf
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